build - GNU make - Target with several recipes where only one recipe is needed -


abstract description

i have following situation in makefile:

target_1 target_2 :     some_recipe_that_creates_both  target_1 :     some_recipe_that_creates_only_target_1

note impossible have recipe builds target_2 without target_1 efficiently. therefore, if need build target_2 avoid running target_1-only recipe. ideally mean make work follows:

  • if tries make target_1 without target_2, use second recipe makefile sample since faster.
  • if tries make target_1 , target_2, use first recipe makefile sample since faster running recipe creates both.

is there way can achieve this? aware of double-colon rules, bu run both recipes instead of 1 of them.

note need solution supports make -j parameter (but there no recursive make).

the real scenario

the following text here completeness sake , due comments asking real scenario here is, describes target_1 , target_2 are:

i compiling shared library , executables depend on it. if finished compiling shared library, make sure exe still sees symbols needs in it. there 2 ways it:

  • have exe linking depend on shared objects.
  • split exe linking 2 steps (with empty marker files targets), exe linking, , missing symbol check (ldd -r). problem exe linking implies missing symbols check, missing symbol check target_1, , linking doing both target_1 , target_2).

it's little bit of hack following might work

ifneq ($(filter target_1,$(if $(filter target_2,$(makecmdgoals)),,$(makecmdgoals))),) target_1 :     some_recipe_that_creates_only_target_1 else target_1 : target_2 endif  target_2 :     some_recipe_that_creates_both

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