makefile - Detect if make command target is a path or a phony -


background

i writing several books in markdown. files structured follows:

                                       description writing/     makefile                        1. main makefile (shown below)     book.template                   2. pandoc template uses title     books/         current.txt                 3. contains current book name         book1/             meta.mk                 4. sub-makefile defines title             chapters/                 01.md               5. actual text of book 1, chapter 1                 02.md                 ...         book2/             meta.mk             chapters/                 01.md                 02.md                 ...         ...

here makefile:

curr_book_name:=$(shell cat books/current.txt) curr_book_dir:=books/$(curr_book_name)/ curr_chapters_dir:=$(curr_book_dir)chapters/ curr_chapters:=$(wildcard $(curr_chapters_dir)*.pdf)  # suppose each meta.mk defines title variable include $(curr_book_dir)/meta.mk   all: pdfs     ...  pdfs: $(curr_chapters)  %.pdf: %.md book.template     pandoc -o $@ $< ...           \         --template=book.template  \         --variable=title:$(title)

i work on 1 book @ time. thus, convenient create file current.txt name of current book. type make compile current book pdf having makefile read in current.txt. note pdf depends on variable defined in book-specific meta.mk.

question

occasionally, want make small change book. how should modify makefile don’t have update current.txt , change each time? more precise, detect whether arguments passed make on command line phony targets or paths. example, process like:

$ cat books/current.txt book1 $ ls books/*/chapters/* books/book1/chapters/01.md  books/book1/chapters/02.md books/book2/chapters/01.md  books/book2/chapters/02.md  $ make pandoc -o books/book1/chapters/01.pdf ... --variable=title:one pandoc -o books/book1/chapters/02.pdf ... --variable=title:one $ ls books/*/chapters/* books/book1/chapters/01.md  books/book1/chapters/02.md books/book1/chapters/01.pdf books/book1/chapters/02.pdf books/book2/chapters/01.md  books/book2/chapters/02.md  $ make books/book2/chapters/01.pdf pandoc -o books/book2/chapters/01.pdf ... --variable=title:two $ ls books/*/chapters/* books/book1/chapters/01.md  books/book1/chapters/02.md books/book1/chapters/01.pdf books/book1/chapters/02.pdf books/book2/chapters/01.md  books/book2/chapters/02.md books/book2/chapters/01.pdf

possible solutions

it suggested override variable on command line:

make curr_book_name=book2 books/book2/chapters/01.pdf

however, think verbose , redundant, since requires repeating name of book twice, , typing name of internal variable curr_book_name once.

note

this simplified example. please ask if want see actual makefile. also, feel free clarify question title.

the following valuable answer posted earlier, after short discussion of pros/cons in comments, answerer deleted , left downvote without opting comment. reproduce here in case helps other users. still looking “more complicated” solution avoids redundancy , allows building individual chapters.

a simple solution copy makefile new file, book.mak , delete first line curr_book_name:=$(shell cat books/current.txt). create new makefile this:

curr_book_name:=$(shell cat books/current.txt)  current:     $(make) -f book.mak curr_book_name="$(curr_book_name)"  book1:     $(make) -f book.mak curr_book_name="book1"  book2:     $(make) -f book.mak curr_book_name="book2"

then when change in book1 while book2 current type make book1. makefile figure out what's changed , update it.

if want able type make books/book2/chapters/01.pdf it's fair bit more complicated.


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