makefile - Why Make doesn't recognize my variable? -


i have short make script, works if put build directory in string manually myself instead of variable:

cc = gcc cflags = -o2 -g -wall -fmessage-length=0 ldflags = srcdir = src builddir = build  srcs = $(srcdir)/main.c objs = $(srcs:.c=.o) libs = target = helloworld  all: dir $(src) build/$(target)  dir:     mkdir -p $(builddir)  build/$(target): $(objs)      $(cc) $(ldflags) $(objs) -o $@  $(srcdir).c.o:     $(cc) $(cflags) $< -o $@  clean:     rm -f $(objs) $(target) 

it stops working error message:

make: *** no rule make target `/helloworld', needed `all'.  stop. 

when replace line:

all: dir $(src) build/$(target) 

with:

all: dir $(src) $(builddir)/$(target) 

why make not substituting $(builddir) clause build?

in code there space after build

builddir = build  

Comments

Popular posts from this blog

c# - Validate object ID from GET to POST -

node.js - Custom Model Validator SailsJS -

php - Find a regex to take part of Email -